Vasudevan’s group has one paper in IEEE Transactions on CAD (TCAD)

Our paper “Emphasizing Functional Relevance Over State Restoration in Post-silicon Signal Tracing” establishes insufficiency of the state-of-the-art metric called State Restoration Ratio (SRR) to evaluate trace signal quality. It also presents a new post-silicon trace signal selection algorithm based on  PageRank. This paper demonstrates that optimizing SRR typically generates signals that are functionally irrelevant to the design and unusable for …

Best paper nomination at ASP-DAC 2019

The quality of the assertions is critical to the confidence and claims in a design’s verification! Our paper  A Figure of Merit for Assertions in Verification by Sam Hertz, Debjit Pal, and Shobha Vasudevan was nominated for the best paper award at ASP-DAC 2019. This presents an approach to rank assertions based on the key parameters that human beings look for to quantify “goodness” of …

Invited talk at Rebooting Conference

Prof. Shobha Vasudevan gave a presentation on “Verification in the era of machine learning” at the International Conference of Rebooting Computing. Read my paper here.

Talk at Georgia Institute of Technology

Prof. Shobha Vasudevan gave a talk on self-driving cars titled “(Self)-driving up the wall: how many million miles of test driving will convince us.” Had an enthusiastic audience.

Talk at VLSI Conference 2019

Prof. Shobha Vasudevan will be giving an invited tutorial talk on analog validation. Talk title “The black art of analog validation”

Associate Editor, IEEE TCAD

Prof Shobha Vasudevan appointed as Associate Editor of IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems (TCAD) from 2016-2018. Please submit your good papers to us!

Take a bow, Adel!

Seyed Nematollah Ahmadyan (Adel) defended his thesis in front of a distinguished committee (Rob Rutenbar, Xin Li, Sayan Mitra, Martin Wong) with flying colors! What started as an analog verification and testing PhD, morphed into an optimization PhD by the time we were done! Adel’s DUPLEX algorithm is a randomized tree based search/sampling algorithm that can create directed analog stimulus, the worst …

Our paper nominated for best paper award at DAC 2018

Our paper “Application Level Hardware Tracing for Scaling Post-Silicon Debug” was nominated for the best paper award at DAC 2018. The paper demonstrates for the first time in published literature in post silicon in hardware tracing, an alternate viewpoint that can make the analysis scale up from tiny benchmarks to a real life SoC environment of the OpenSparc T2. It …

Talk at Google Brain

I gave a talk at Google Inc. in the Google Brain hardware group on current research in the group. Exciting directions.

In Stanford for 2017

I will be visiting the CS department at Stanford University in 2017. Looking forward to interacting and collaborating with my host Prof Subhashish Mitra and other faculty.

IBM Faculty Award

Prof. Shobha Vasudevan awarded the IBM faculty partnership award 2017 for post Silicon validation of many core systems

Congratulations Sai Ma, Rui Jiang and Tian Xia!

Sai Ma, winner of the DAC 2014 best paper award, graduated with an M.S. and joined Apple Corporation in the verification team. Rui Jiang with novel work on ESD induced reliability joined Apple as well as did Tian Xia with an M.S. thesis on neural network hardware implementation.

Congratulations Jiayi Duan!

Jiayi Duan from our group finished a master’s thesis on “Feature Engineering for Detecting Security Compromises in Enterprise Log Data”. He used a creative method based on Fourier Transforms to get more than 70% increased malicious recall on real enterprise log data. He will be working on machine learning problems in Amazon Inc. starting July 2016.

Post-Si paper nominated for Best Paper award in ICCAD 2015

Our paper, “Can’t see the forest for the trees: State restoration’s limitations in selecting signals for post-silicon debug” was nominated for best paper as one among 3 in ICCAD 2015. A journal paper will follow, demonstrating the scale of our technique on the OpenSparc T2.

Watch out for our radical Post-Silicon validation paper in ICCAD 2015! (Best-paper candidate)

Our paper, “Can’t see the forest for the trees: State restoration’s limitations in selecting signals for post-silicon debug” systematically exposes the pitfalls of the state restoration ratio (SRR) signal selection methodologies of the past decade. It takes a first step in the direction of thinking differently about post-Silicon signal selection and opens it up for potentially better solutions.

Eye diagram analysis paper nominated for Best Paper

Our paper, Fast Eye Diagram Analysis for High Speed CMOS Circuits was nominated for best paper at DATE 2015. It was one of 6 about 240 accepted papers. Congratulations to my student Seyed Nematollah (Adel) Ahmadyan! The paper was written in collaboration with Intel and presents a powerful method to explore the analog/mixed signal design space. This proposes an alternative for …

IEEE Design and Test editorial board

Shobha Vasudevan named as one of the editors of IEEE Design and Test. Please submit good papers to this magazine with wide readership in the design community.

Vasudevan wins ACM SIGDA Outstanding New Faculty Award

The award is given by ACM SIGDA to one junior faculty member who displays outstanding potential as an educator and/or researcher in the field of EDA. Many thanks to my students and collaborators for their role in this recognition. Pictures of the award ceremony can be found here.

Best Paper Award in DAC 2014

Our paper at DAC 2014 “Code Coverage of Assertions Using RTL Source Code Analysis” won the best paper award ! The college, department and CSL ran an article on it. This was my first paper with a female graduate student, Sai Ma. Way to go Sai!!

Best paper award in VLSI Design 2014

Our paper “A Coverage Guided mining Approach for Automatic Generation of Succint Assertions” was awarded the best paper award at the VLSI Design conference 2014. Yet another GoldMine victory! The authors are Shobha Vasudevan, Lingyi Liu, David Sheridan and Hyung Sul Kim. An article appeared on the ECE website on it.

Watch out for our paper at DAC 2014

“Code Coverage of Assertions Using RTL Source Code Analysis” by Viraj Athavale, Sai Ma, Sam Hertz and Shobha Vasudevan. This paper generates a code coverage metric for assertions using dynamic and static analysis techniques. Attend our presentation at DAC 2014!

ACM SIGDA Outstanding New Faculty Award

Prof Vasudevan wins the ACM SIGDA outstanding new faculty award. The award is given by ACM SIGDA to one junior faculty member who displays outstanding potential as an educator and/or researcher in the field of EDA. Many thanks to my students and collaborators for their role in this recognition.

Goldmine website live and kicking!

GoldMine is now available for academic and research purposes for free download. Please use for intended and new applications and give us your feedback! If you need GoldMine for a commercial purpose, please write to Prof. Shobha Vasudevan for an evaluation license.  

Our paper on invariant mining for debugging programs in ASE 2013

Parth Sagdeo et al’s paper “Using Automatically Generated Invariants for Regression Testing and Bug Localization” introduces a novel bug localization methodology with PREAMBL, a predicate clustering and invariant guided tool. Invariants from PRECIS in ASE 2011 are used for software regression testing as well.